|
Best Jobs in Bangalore, Bangalore Jobs, Careers in
Bangalore,
Jobs, Bangalore. |
|
Date |
Designation / Functional Area / Location |
Company Name |
Min. Exp. |
Candidate Profile / Job Skills |
Job Description |
|
14/04/2008 |
Sr Mask Design Engineer / Embedded/EDA /VLSI/ASIC/Chip Design
Bangalore |
The Human Capital |
5 - 10 Years |
In this position, the individual will be responsible
for creating custom layout on cell level, block level and involved in
top-level integration work of the 3-dimensional nonvolatile memory. |
Sr Mask Design Engineer for SanDisk. You will be
responsible for creating custom layout on cell level, block level and
involved in top-level integration work of the 3-dimensional nonvolatile
memory. |
|
14/04/2008 |
Senior Firmware Engineer / Embedded/EDA /VLSI/ASIC/Chip Design
Bangalore |
The Human Capital |
5 - 10 Years |
'Experience in real-time C and C++ and Python is
required. 'Knowledge and experience in real time embedded software design
is required. 'Good knowledge of real time operating systems. 'System
analysis skills. |
Senior Firmware Engineer For Sandisk,(Revenues of 3.3
B, USD)the world's largest supplier of innovative flash memory data
storage products.'Experience in real-time RTOS |
|
14/04/2008 |
Design Engineer II (Analog and Custom Design) / Embedded/EDA /VLSI/ASIC/Chip
Design,
Bangalore |
The Human Capital |
1 - 5 Years |
Successful candidates will work with the Flash design
team in Sunnyvale to architect, design and develop NAND Flash memory
products utilizing state of the art non-volatile technologies. |
Design Engineer II (Analog and Custom Design) exp in
Voltage domain Analog design/ Custom Digital design. understanding in MOS
device physics exp in HSPICE/HSIM/ Finesim/Opus/ StarRC-XT, Calibre xRC |
|
14/04/2008 |
Senior Engineer (Custom Design and Timing Verification) / Embedded/EDA
/VLSI/ASIC/Chip Design
Bangalore |
The Human Capital |
3 - 8 Years |
Successful candidates will work with the Flash design
team in Sunnyvale to architect, design and develop NAND Flash memory
products utilizing state of the art non-volatile technologies. In this
highly visible role you will perform the following duties: |
Sr Engr(Custom Design and Timing Verification) exp in
custom Digital design/ Timing Verification / Standard cell Development /
Macro Cell Development / IO Design.strong in MOS device Physics |
|
14/04/2008 |
The
Human Capital / Senior Engineer (Custom Design and Timing Verification) /
Embedded/EDA /VLSI/ASIC/Chip Design
Bangalore |
The Human Capital |
1 - 3 Years |
Document and present new architectures, new and
enhanced circuit designs, and simulation results during design reviews
Work with layout engineers and closely interact with them during the
design phase by |
Design Engineer I(Custom Design and Timing
Verification) experience in custom Digital design/ Timing Verification /
Standard cell Development / Macro Cell Development / IO Design |
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